Xilinx And Paxonet Communications Announce Industry's First Programmable STS-192 Sonet Solution
SANTA CLARA, CA--(INTERNET WIRE)--Jul 25, 2002 -- At the Metro Optical Networking Forum today, Xilinx, Inc.,
(NASDAQ:XLNX) and Paxonet Communications, a Xilinx(R) AllianceCORE(TM)
member and a leading telecommunications IP and Silicon provider,
announced the immediate availability of the industry's first
STS-192 SONET IP core package implemented on programmable
logic. The solution entails complete STS-192 SONET Framing
and Path Processing. The new cores, optimized for Xilinx
Virtex-II(TM) and Virtex-II Pro(TM) FPGAs, offer the first
validated non-ASIC solution for supporting full STS-192
SONET/SDH speeds on programmable logic devices. Target applications
at the metropolitan edges of the network include Multi-Service
Switches, Regenerators, Path Terminators, Add-Drop Multiplexers,
Digital Cross Connects, Traffic Aggregators, and SONET Test
Equipment.
"Extending Paxonet's SONET line of IP cores to encompass
STS-192 provides our customers with fully flexible, customizable
SONET solutions. The multi-gigabit serial I/O capability
of Xilinx Virtex-II Pro devices is an ideal target for these
cores, allowing customers to take full advantage of the
combination while reducing their time to market," said Kevin
Wayne Williams, vice president of Marketing at Paxonet.
"Paxonet's ability to provide a full range of SONET solutions
on Xilinx FPGAs presents a flexible alternative to ASIC
implementation, offering faster time-to-market," said Robert
Bielby, senior director of Strategic Solutions at Xilinx.
"We expect this solution to further our penetration into
leading-edge metro-edge and core applications."
The new STS-192 IP Cores are compliant with ITU G707, G.783,
BellCore GR253, and ANSI T1.105 standards and offer complete
SONET Framing and Path Processing support, including: aligning
byte and frame on the incoming signal, inserting framing
bytes (A1, A2) during transmissions, maintaining B1 and
B2 (BIP-1536) parity error counts in the receive section,
computing BIP-8 parity as B1 byte and BIP-1536 parity as
B2 bytes in the transmit section, and full processing of
receive, transmit, and overhead pointers.
Availability
The STS-192 Kit, consisting of the STS-192 SONET Framer
and the STS-192 Path Processor, is immediately available
and will be showcased today in the Paxonet booth at the
Metro Optical Networking Forum. For more information, visit
the Xilinx IP Center at www.xilinx.com/ipcenter
or www.paxonet.com.
These products are available directly from Paxonet Communications
under the terms of the SignOnce IP License, the industry's
first multi-vendor common license for FPGA-based IP. Visit
www.xilinx.com/ipcenter/signonce
for more information.
Xilinx Online Resource for Metro Area Network Design
Xilinx eSP (www.xilinx.com/esp)
is a proven resource for engineers, with four million visits
since its introduction early last year. The latest segment
on the eSP Web portal is dedicated to accelerating the development
of metro area and edge access networking products. The site
is a comprehensive resource, delivering a powerful array
of solutions and information in a single location.
About Paxonet
Paxonet Communications, Inc., designs, develops and markets
silicon solutions for interworking metro networking technologies
to SONET. Paxonet Communications offers the MetroConnect
line of integrated circuits and the CoreEl line of specialized
IP cores focused on the metro market. By offering a full
range of interoperable ICs and IP cores, Paxonet enables
customers to offer highly differentiated, low cost solutions
with a quicker time to market. The company is privately
held and employs 115 people. For more information about
Paxonet Communications and its line of products, visit www.Paxonet.com.
About Xilinx
Xilinx is the worldwide leader of programmable logic solutions.
Additional information about Xilinx can be found at www.xilinx.com.
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